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[AT91SAM7X256]problem z FLASH-em

mastermariusz 21 Lut 2009 12:43 2930 12
  • #1 21 Lut 2009 12:43
    mastermariusz
    Poziom 11  

    Witam wszystkich.
    Zacznę od początku...
    Chcąc zacząć zabawę z ARM-ami zakupiłem uC Atmela AT91SAM7X256 do tego zaprojektowałem prostą płytke(ARM+stabilizator+porty wypuszczone na goldpinach)Bazowałem sie na schemacie płytki testowej OLIMEX-a. Programator to ARMJTAG USB(taki z allegro) Po sprawdzeniu płytka wolna od zwarć i przerw w ścieżkach. Napięcie bezpieczne dla ARM (3.3V) na wyjściu VDDout mam 1.8 V. Wszystko VDDcore podłączone. Doprowadzone napięcia odfiltrowane kondensatorami 100n.
    Po zainstalowaniu sterowników do programatora, podłączeniu go do płytki oraz połączeniu sie z nim przez openocd-ftd2xx.exe

    Code:

    Open On-Chip Debugger (2008-06-19 19:00) svn: 717
    URL: http://svn.berlios.de/svnroot/repos/openocd/trunk
    Debug:   5 0 command.c:432 command_run_line(): script sam7x256.cfg
    Debug:   6 0 configuration.c:87 open_file_from_path(): opened sam7x256.cfg
    Debug:   8 0 command.c:432 command_run_line(): telnet_port 4444
    Debug:   10 0 command.c:432 command_run_line(): gdb_port 3333
    Debug:   12 0 command.c:432 command_run_line(): interface ft2232
    Debug:   14 0 command.c:432 command_run_line(): ft2232_device_desc "ARMJTAG A"
    Debug:   16 0 command.c:432 command_run_line(): ft2232_layout jtagkey
    Debug:   18 0 command.c:432 command_run_line(): ft2232_vid_pid 0x0403 0xcff8
    Debug:   20 0 command.c:432 command_run_line(): jtag_speed 5
    Debug:   21 0 jtag.c:1863 handle_jtag_speed_command(): handle jtag speed
    Info:    22 0 options.c:50 configuration_output_handler(): jtag_speed: 5, 5
    Debug:   24 0 command.c:432 command_run_line(): jtag_nsrst_delay 200
    Debug:   26 0 command.c:432 command_run_line(): jtag_ntrst_delay 200
    Debug:   28 0 command.c:432 command_run_line(): reset_config trst_and_srst separate
    Debug:   30 0 command.c:432 command_run_line(): jtag_device 4 0x1 0xf 0xe
    Debug:   32 0 command.c:432 command_run_line(): daemon_startup reset
    Info:    33 0 options.c:50 configuration_output_handler(): Open On-Chip Debugger (2008-06-19 19:00) svn: 717
    Debug:   35 0 command.c:432 command_run_line(): target arm7tdmi little run_and_init 0 arm7tdmi
    Debug:   37 0 command.c:432 command_run_line(): run_and_halt_time 0 30
    Debug:   39 16 command.c:432 command_run_line(): target_script 0 sam7x256_reset.script




    Error:   40 16 target.c:1480 handle_target_script_command(): incomplete target_script command
    Info:    41 16 options.c:50 configuration_output_handler(): Syntax error:
    Info:    42 16 options.c:50 configuration_output_handler():        target_script        no help available
    Debug:   44 16 command.c:432 command_run_line(): flash bank at91sam7 0 0 0 0 0
    Debug:   46 16 command.c:432 command_run_line(): init
    Debug:   47 16 openocd.c:102 handle_init_command(): target init complete
    Debug:   48 16 ft2232.c:1374 ft2232_init_ftd2xx(): 'ft2232' interface using FTD2XX with 'jtagkey' layout (0403:cff8)
    Debug:   49 63 ft2232.c:1463 ft2232_init_ftd2xx(): current latency timer: 2
    Debug:   50 63 ft2232.c:1729 jtagkey_init(): 80 08 1b
    Debug:   51 63 ft2232.c:1787 jtagkey_init(): 82 09 0f
    Debug:   52 63 ft2232.c:253 ft2232_speed(): 86 05 00
    Debug:   53 78 openocd.c:109 handle_init_command(): jtag interface init complete
    Debug:   54 78 jtag.c:1537 jtag_init_inner(): Init JTAG chain
    Debug:   55 78 jtag.c:326 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST)
    Debug:   56 78 jtag.c:1295 jtag_reset_callback(): -
    Debug:   57 78 jtag.c:326 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST)
    Debug:   58 78 jtag.c:1295 jtag_reset_callback(): -
    Info:    59 94 jtag.c:1389 jtag_examine_chain(): JTAG device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
    Debug:   60 94 jtag.c:326 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST)
    Debug:   61 94 jtag.c:1295 jtag_reset_callback(): -
    Debug:   62 94 openocd.c:116 handle_init_command(): jtag init complete
    Debug:   63 94 openocd.c:119 handle_init_command(): jtag examine complete
    Debug:   64 94 openocd.c:126 handle_init_command(): flash init complete
    Debug:   65 94 openocd.c:130 handle_init_command(): NAND init complete
    Debug:   66 94 openocd.c:134 handle_init_command(): pld init complete
    Debug:   67 110 gdb_server.c:2036 gdb_init(): gdb service for target arm7tdmi at port 3333
    Debug:   69 110 command.c:432 command_run_line(): reset
    Debug:   70 110 target.c:1851 handle_reset_command(): -
    Debug:   71 110 ft2232.c:253 ft2232_speed(): 86 05 00
    Debug:   72 110 jtag.c:1581 jtag_init_reset(): Trying to bring the JTAG controller to life by asserting TRST / TLR
    Debug:   73 110 jtag.c:996 jtag_add_reset(): SRST line released
    Debug:   74 125 jtag.c:1015 jtag_add_reset(): TRST line asserted
    Debug:   75 125 jtag.c:326 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST)
    Debug:   76 125 jtag.c:1295 jtag_reset_callback(): -
    Debug:   77 125 jtag.c:992 jtag_add_reset(): SRST line asserted
    Debug:   78 125 jtag.c:1015 jtag_add_reset(): TRST line asserted
    Debug:   79 125 jtag.c:326 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST)
    Debug:   80 125 jtag.c:1295 jtag_reset_callback(): -
    Debug:   81 125 jtag.c:992 jtag_add_reset(): SRST line asserted
    Debug:   82 125 jtag.c:996 jtag_add_reset(): SRST line released
    Debug:   83 125 ft2232.c:1004 jtagkey_reset(): trst: 1, srst: 0, high_output: 0x08, high_direction: 0x0f
    Debug:   84 328 ft2232.c:1004 jtagkey_reset(): trst: 1, srst: 1, high_output: 0x00, high_direction: 0x0f
    Debug:   85 328 ft2232.c:1004 jtagkey_reset(): trst: 0, srst: 1, high_output: 0x01, high_direction: 0x0f
    Debug:   86 532 ft2232.c:1004 jtagkey_reset(): trst: 0, srst: 0, high_output: 0x09, high_direction: 0x0f
    Debug:   87 938 jtag.c:1537 jtag_init_inner(): Init JTAG chain
    Debug:   88 938 jtag.c:326 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST)
    Debug:   89 938 jtag.c:1295 jtag_reset_callback(): -
    Info:    90 938 jtag.c:1389 jtag_examine_chain(): JTAG device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3
    Debug:   91 938 jtag.c:326 jtag_call_event_callbacks(): jtag event: JTAG controller reset (TLR or TRST)
    Debug:   92 953 jtag.c:1295 jtag_reset_callback(): -
    Debug:   93 953 arm7_9_common.c:767 arm7_9_assert_reset(): target->state: unknown
    Debug:   94 953 jtag.c:992 jtag_add_reset(): SRST line asserted
    Debug:   95 953 ft2232.c:1004 jtagkey_reset(): trst: 0, srst: 1, high_output: 0x01, high_direction: 0x0f
    Debug:   96 1203 arm7_9_common.c:820 arm7_9_deassert_reset(): target->state: reset
    Debug:   97 1203 jtag.c:996 jtag_add_reset(): SRST line released
    Debug:   98 1203 ft2232.c:1004 jtagkey_reset(): trst: 0, srst: 0, high_output: 0x09, high_direction: 0x0f
    Debug:   99 1610 target.c:411 target_process_reset(): Waiting for halted stated as approperiate
    Debug:   100 1610 arm7_9_common.c:960 arm7_9_halt(): target->state: running
    Debug:   101 1610 embeddedice.c:397 embeddedice_write_reg(): 9: 0xffffffff
    Debug:   102 1610 embeddedice.c:397 embeddedice_write_reg(): 11: 0xffffffff
    Debug:   103 1610 embeddedice.c:397 embeddedice_write_reg(): 12: 0x00000100
    Debug:   104 1625 embeddedice.c:397 embeddedice_write_reg(): 13: 0x000000f7
    Debug:   105 1625 target.c:425 target_process_reset(): Polling target
    Debug:   106 1625 embeddedice.c:397 embeddedice_write_reg(): 0: 0x00000005
    Debug:   107 1625 embeddedice.c:397 embeddedice_write_reg(): 12: 0x00000000
    Debug:   108 1625 arm7_9_common.c:1074 arm7_9_debug_entry(): target entered debug from ARM state
    Debug:   109 1641 arm7_9_common.c:1106 arm7_9_debug_entry(): target entered debug state in Abort mode
    Debug:   110 1641 arm7_9_common.c:1137 arm7_9_debug_entry(): r0: 0x00000800
    Debug:   111 1641 arm7_9_common.c:1137 arm7_9_debug_entry(): r1: 0x00000001
    Debug:   112 1641 arm7_9_common.c:1137 arm7_9_debug_entry(): r2: 0xd39d96c5
    Debug:   113 1641 arm7_9_common.c:1137 arm7_9_debug_entry(): r3: 0x55bc4fdd
    Debug:   114 1641 arm7_9_common.c:1137 arm7_9_debug_entry(): r4: 0x0020ffa0
    Debug:   115 1641 arm7_9_common.c:1137 arm7_9_debug_entry(): r5: 0x00000000
    Debug:   116 1641 arm7_9_common.c:1137 arm7_9_debug_entry(): r6: 0x00000000
    Debug:   117 1641 arm7_9_common.c:1137 arm7_9_debug_entry(): r7: 0x00000000
    Debug:   118 1641 arm7_9_common.c:1137 arm7_9_debug_entry(): r8: 0x00000000
    Debug:   119 1641 arm7_9_common.c:1137 arm7_9_debug_entry(): r9: 0x00000000
    Debug:   120 1657 arm7_9_common.c:1137 arm7_9_debug_entry(): r10: 0x00000000
    Debug:   121 1657 arm7_9_common.c:1137 arm7_9_debug_entry(): r11: 0x0020ff8c
    Debug:   122 1657 arm7_9_common.c:1137 arm7_9_debug_entry(): r12: 0x0020ff90
    Debug:   123 1657 arm7_9_common.c:1137 arm7_9_debug_entry(): r13: 0x00000001
    Debug:   124 1657 arm7_9_common.c:1137 arm7_9_debug_entry(): r14: 0x00100638
    Debug:   125 1657 arm7_9_common.c:1137 arm7_9_debug_entry(): r15: 0x00000010
    Debug:   126 1657 arm7_9_common.c:1143 arm7_9_debug_entry(): entered debug state at PC 0x10
    Debug:   127 1657 target.c:724 target_call_event_callbacks(): target event 0
    Debug:   128 1672 ft2232.c:253 ft2232_speed(): 86 05 00

    wpisaniu przez telnet polecenia flash info 0
    otrzymuje odpowiedz od układu:
    Code:
    > flash info 0
    
    #0: at91sam7 at 0x00100000, size 0x00040000, buswidth 4, chipwidth 0
            #0: 0x00000000 (0x40000 256kB) protection state unknown

    at91sam7 information: Chip is AT91SAM7X256
    cidr: 0x275b0940, arch: 0x0075, eproc: ARM7TDMI, version:0x000,  flashsize: 0x00040000
    master clock(estimated): 53227kHz
    pagesize: 256, lockbits: 16 0x0000, pages in lock region: 64
    securitybit: 0,  nvmbits(3): 0x4

    przebieg odpowiedzi wygląda tak:
    Code:
    Info:    129 80860 server.c:78 add_connection(): accepting 'telnet' connection from 0
    
    Debug:   131 84016 command.c:432 command_run_line(): flash info 0
    Debug:   132 84016 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xfffff240, size: 0x00000004, count: 0x00000001
    Debug:   133 84016 target.c:1170 target_read_u32(): address: 0xfffff240, value: 0x275b0940
    Debug:   134 84016 at91sam7.c:366 at91sam7_read_part_info(): nvptyp: 0x002, arch: 0x0075
    Debug:   135 84016 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xfffffc24, size: 0x00000004, count: 0x00000001
    Debug:   136 84032 target.c:1170 target_read_u32(): address: 0xfffffc24, value: 0x000127e0
    Debug:   137 84032 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xfffffc30, size: 0x00000004, count: 0x00000001
    Debug:   138 84032 target.c:1170 target_read_u32(): address: 0xfffffc30, value: 0x00000007
    Debug:   139 84032 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xfffffc2c, size: 0x00000004, count: 0x00000001
    Debug:   140 84047 target.c:1170 target_read_u32(): address: 0xfffffc2c, value: 0x1048100e
    Debug:   141 84047 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xfffffc2c, size: 0x00000004, count: 0x00000001
    Debug:   142 84063 target.c:1170 target_read_u32(): address: 0xfffffc2c, value: 0x1048100e
    Debug:   143 84063 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xffffff68, size: 0x00000004, count: 0x00000001
    Debug:   144 84063 target.c:1170 target_read_u32(): address: 0xffffff68, value: 0x00000401
    Debug:   145 84063 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xffffff68, size: 0x00000004, count: 0x00000001
    Debug:   146 84063 target.c:1170 target_read_u32(): address: 0xffffff68, value: 0x00000401

    wgranie przykładowego kodu znalezionego w necie(mryganie podświetleniem LCD na bazie płytki Olimexa nie działa
    Chciałem odpalić przez SAM-BA ale też nic z tego.
    Próba skasowania bitu gpnvm:
    at91sam7 gpnvm 0 2 clear
    w celu odpalenie SAM-BA nic nie daje:
    Przebieg kasowanie wygląda tak:
    Code:

    Debug:   148 313860 command.c:432 command_run_line(): at91sam7 gpnvm 0 2 clear
    Debug:   149 313860 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xfffffc24, size: 0x00000004, count: 0x00000001
    Debug:   150 313860 target.c:1170 target_read_u32(): address: 0xfffffc24, value: 0x000127e0
    Debug:   151 313860 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xfffffc30, size: 0x00000004, count: 0x00000001
    Debug:   152 313875 target.c:1170 target_read_u32(): address: 0xfffffc30, value: 0x00000007
    Debug:   153 313875 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xfffffc2c, size: 0x00000004, count: 0x00000001
    Debug:   154 313875 target.c:1170 target_read_u32(): address: 0xfffffc2c, value: 0x1048100e
    Debug:   155 313875 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xfffffc2c, size: 0x00000004, count: 0x00000001
    Debug:   156 313875 target.c:1170 target_read_u32(): address: 0xfffffc2c, value: 0x1048100e
    Debug:   157 313875 at91sam7.c:246 at91sam7_set_flash_mode(): fmcn[0]: 54
    Debug:   158 313875 target.c:1238 target_write_u32(): address: 0xffffff60, value: 0x00360100
    Debug:   159 313907 embeddedice.c:397 embeddedice_write_reg(): 0: 0x00000004
    Debug:   160 313907 embeddedice.c:397 embeddedice_write_reg(): 0: 0x00000005
    Debug:   161 313907 target.c:1238 target_write_u32(): address: 0xffffff64, value: 0x5a00020d
    Debug:   162 313907 embeddedice.c:397 embeddedice_write_reg(): 0: 0x00000004
    Debug:   163 313907 embeddedice.c:397 embeddedice_write_reg(): 0: 0x00000005
    Debug:   164 313922 at91sam7.c:290 at91sam7_flash_command(): Flash command: 0x5a00020d, flashplane: 0, pagenumber:2
    Debug:   165 313922 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xffffff68, size: 0x00000004, count: 0x00000001
    Debug:   166 313922 target.c:1170 target_read_u32(): address: 0xffffff68, value: 0x00000400
    Debug:   167 313922 at91sam7.c:260 at91sam7_wait_status_busy(): status[0]: 0x400
    Debug:   168 313922 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xffffff68, size: 0x00000004, count: 0x00000001
    Debug:   169 313922 target.c:1170 target_read_u32(): address: 0xffffff68, value: 0x00000401
    Debug:   170 313922 at91sam7.c:264 at91sam7_wait_status_busy(): status[0]: 0x401
    Debug:   171 313922 arm7_9_common.c:1825 arm7_9_read_memory(): address: 0xffffff68, size: 0x00000004, count: 0x00000001
    Debug:   172 313938 target.c:1170 target_read_u32(): address: 0xffffff68, value: 0x00000401
    Debug:   173 313938 at91sam7.c:945 at91sam7_handle_gpnvm_command(): at91sam7_handle_gpnvm_command: cmd 0xd, value 0x2, status 0x401

    Próbowałem już różncyh skryptów i metod programowania ale nic nie daje pozytywnych skutków:
    Zastanawia mnie jedno:
    Co znaczy:
    status[0]: 0x401
    oraz czy oby napewno powinno być:
    0: at91sam7 at 0x00100000, size 0x00040000, buswidth 4, chipwidth 0
    #0: 0x00000000 (0x40000 256kB) protection state unknown
    Dodam że wywołanie polecenia odczytu pamięci:
    dump_image C:\flashi.bin 0x0020000 0x00040000
    przebiega wpożądku
    Code:

    > dump_image C:\flashi.bin 0x0010000 0x00040000
    dumped 262144 byte in 18.062500s

    z tym że po odczycie widać że jest coś w niej
    ponowny odczyt z innego sektora:
    dump_image C:\flashi.bin 0x0010000 0x00040000
    po porównaniu jest to samo. czy powinno...?

    W czym tkwi problem...?
    Proszę o pomoc.
    Z góry wielkie dzięki.

    0 12
  • CControls
  • #2 21 Lut 2009 18:55
    irutkows
    Poziom 12  

    A może plik konfiguracyjny OpenOCD? To łatwiej pewnie będzie pomóc.

    0
  • #3 21 Lut 2009 21:33
    Freddie Chopin
    Specjalista - Mikrokontrolery

    tak w ogole to od czasu openocd r717 uplynelo juz troche wody. na mojej stronie - jak i na stronie projektu openocd - jest do pobrania instalator wersji 0.1.0

    http://www.freddiechopin.info/

    4\/3!!

    0
  • #4 22 Lut 2009 20:26
    mastermariusz
    Poziom 11  

    Dzięki za podsunięcie nowej wersji OpenOCD.
    po małych zmianach w plikach konfiguracyjnych połączyłem sie programatorem.

    Code:


    C:\OpenOCD\0.1.0\bin>openocd.exe -d -f interface/jtagkey.cfg -f target/sam7x256.cfg -c init -c reset 0
    Open On-Chip Debugger 0.1.0 (2009-01-21-21:15) Release


    BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS


    $URL: https://kc8apf@svn.berlios.de/svnroot/repos/openocd/tags/openocd-0.1.0/src/openocd.c $
    User : 5 0 command.c:494 command_run_line():
    Debug: 6 0 configuration.c:88 find_file(): found C:\OpenOCD\0.1.0\bin\../interface/jtagkey.cfg
    Debug: 8 0 command.c:91 script_command(): script_command - telnet_port
    Debug: 9 0 command.c:108 script_command(): script_command - telnet_port, argv[0]=ocd_telnet_port
    Debug: 10 0 command.c:108 script_command(): script_command - telnet_port, argv[1]=4444
    Debug: 12 0 command.c:91 script_command(): script_command - gdb_port
    Debug: 13 0 command.c:108 script_command(): script_command - gdb_port, argv[0]=ocd_gdb_port
    Debug: 14 0 command.c:108 script_command(): script_command - gdb_port, argv[1]=3333
    Debug: 16 0 command.c:91 script_command(): script_command - gdb_memory_map
    Debug: 17 0 command.c:108 script_command(): script_command - gdb_memory_map, argv[0]=ocd_gdb_memory_map
    Debug: 18 0 command.c:108 script_command(): script_command - gdb_memory_map, argv[1]=enable
    Debug: 20 0 command.c:91 script_command(): script_command - gdb_flash_program
    Debug: 21 0 command.c:108 script_command(): script_command - gdb_flash_program, argv[0]=ocd_gdb_flash_program
    Debug: 22 0 command.c:108 script_command(): script_command - gdb_flash_program, argv[1]=enable
    Debug: 24 0 command.c:91 script_command(): script_command - interface
    Debug: 25 0 command.c:108 script_command(): script_command - interface, argv[0]=ocd_interface
    Debug: 26 0 command.c:108 script_command(): script_command - interface, argv[1]=ft2232
    Debug: 28 0 command.c:91 script_command(): script_command - ft2232_device_desc
    Debug: 29 0 command.c:108 script_command(): script_command - ft2232_device_desc, argv[0]=ocd_ft2232_device_desc
    Debug: 30 0 command.c:108 script_command(): script_command - ft2232_device_desc, argv[1]=ARMJTAG A
    Debug: 32 0 command.c:91 script_command(): script_command - ft2232_layout
    Debug: 33 0 command.c:108 script_command(): script_command - ft2232_layout, argv[0]=ocd_ft2232_layout
    Debug: 34 0 command.c:108 script_command(): script_command - ft2232_layout, argv[1]=jtagkey
    Debug: 36 0 command.c:91 script_command(): script_command - ft2232_vid_pid
    Debug: 37 0 command.c:108 script_command(): script_command - ft2232_vid_pid, argv[0]=ocd_ft2232_vid_pid
    Debug: 38 0 command.c:108 script_command(): script_command - ft2232_vid_pid, argv[1]=0x0403
    Debug: 39 0 command.c:108 script_command(): script_command - ft2232_vid_pid, argv[2]=0xcff8
    Debug: 41 0 command.c:91 script_command(): script_command - jtag_speed
    Debug: 42 0 command.c:108 script_command(): script_command - jtag_speed, argv[0]=ocd_jtag_speed
    Debug: 43 0 command.c:108 script_command(): script_command - jtag_speed, argv[1]=5
    Debug: 44 0 jtag.c:2620 handle_jtag_speed_command(): handle jtag speed
    User : 45 16 command.c:383 command_print(): jtag_speed: 5
    User : 46 16 command.c:494 command_run_line():
    Debug: 47 16 configuration.c:88 find_file(): found C:\OpenOCD\0.1.0\bin\../target/sam7x256.cfg
    Debug: 49 16 command.c:91 script_command(): script_command - reset_config
    Debug: 50 16 command.c:108 script_command(): script_command - reset_config, argv[0]=ocd_reset_config
    Debug: 51 16 command.c:108 script_command(): script_command - reset_config, argv[1]=srst_only
    Debug: 52 16 command.c:108 script_command(): script_command - reset_config, argv[2]=srst_pulls_trst
    Debug: 53 16 jtag.c:1892 jim_newtap_cmd(): Creating New Tap, Chip: sam7x256, Tap: cpu, Dotted: sam7x256.cpu, 8 params
    Debug: 54 16 jtag.c:1911 jim_newtap_cmd(): Processing option: -irlen
    Debug: 55 16 jtag.c:1911 jim_newtap_cmd(): Processing option: -ircapture
    Debug: 56 16 jtag.c:1911 jim_newtap_cmd(): Processing option: -irmask
    Debug: 57 16 jtag.c:1911 jim_newtap_cmd(): Processing option: -expected-id
    Debug: 58 16 jtag.c:2024 jim_newtap_cmd(): Created Tap: sam7x256.cpu @ abs position 0, irlen 4, capture: 0x1 mask: 0xf
    Debug: 59 16 target.c:3911 jim_target(): Target command params:
    Debug: 60 16 target.c:3912 jim_target(): target create sam7x256.cpu arm7tdmi -endian little -chain-position sam7x256.cpu -variant arm7tdmi
    Debug: 62 16 command.c:91 script_command(): script_command - bank
    Debug: 63 16 command.c:108 script_command(): script_command - bank, argv[0]=ocd_flash_bank
    Debug: 64 16 command.c:108 script_command(): script_command - bank, argv[1]=at91sam7
    Debug: 65 16 command.c:108 script_command(): script_command - bank, argv[2]=0
    Debug: 66 16 command.c:108 script_command(): script_command - bank, argv[3]=0
    Debug: 67 31 command.c:108 script_command(): script_command - bank, argv[4]=0
    Debug: 68 31 command.c:108 script_command(): script_command - bank, argv[5]=0
    Debug: 69 31 command.c:108 script_command(): script_command - bank, argv[6]=0
    User : 70 31 command.c:494 command_run_line():
    Debug: 72 31 command.c:91 script_command(): script_command - init
    Debug: 73 31 command.c:108 script_command(): script_command - init, argv[0]=ocd_init
    Debug: 74 31 openocd.c:144 handle_init_command(): target init complete
    Debug: 75 31 ft2232.c:1463 ft2232_init_ftd2xx(): 'ft2232' interface using FTD2XX with 'jtagkey' layout (0403:cff8)
    Debug: 76 47 ft2232.c:1550 ft2232_init_ftd2xx(): current latency timer: 2
    Debug: 77 63 ft2232.c:1885 jtagkey_init(): 80 08 1b
    Debug: 78 63 ft2232.c:1943 jtagkey_init(): 82 09 0f
    Debug: 79 63 ft2232.c:276 ft2232_speed(): 86 05 00
    Debug: 80 78 openocd.c:151 handle_init_command(): jtag interface init complete
    Debug: 81 78 jtag.c:2240 jtag_init_inner(): Init JTAG chain
    Debug: 82 78 jtag.c:434 jtag_call_event_callbacks(): jtag event: JTAG controller reset (RESET or TRST)
    Debug: 83 78 jtag.c:1487 jtag_reset_callback(): -
    Debug: 84 78 jtag.c:434 jtag_call_event_callbacks(): jtag event: JTAG controller reset (RESET or TRST)
    Debug: 85 94 jtag.c:1487 jtag_reset_callback(): -
    Info : 86 94 jtag.c:1607 jtag_examine_chain(): JTAG tap: sam7x256.cpu tap/device found: 0x05b1703f (Manufacturer: 0x01f, Part: 0x5b17, Versi
    on: 0x0)
    Error: 87 94 jtag.c:1631 jtag_examine_chain(): JTAG tap: sam7x256.cpu             got: 0x05b1703f (mfg: 0x01f, part: 0x5b17, ver: 0x0)
    Error: 88 94 jtag.c:1640 jtag_examine_chain(): JTAG tap: sam7x256.cpu expected 1 of 1: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)
    Error: 89 94 jtag.c:2255 jtag_init_inner(): trying to validate configured JTAG chain anyway...
    Debug: 90 94 jtag.c:434 jtag_call_event_callbacks(): jtag event: JTAG controller reset (RESET or TRST)
    Debug: 91 94 jtag.c:1487 jtag_reset_callback(): -
    Debug: 92 94 openocd.c:157 handle_init_command(): jtag init complete
    Error: 93 110 embeddedice.c:197 embeddedice_build_reg_cache(): unknown EmbeddedICE version (comms ctrl: 0x00000000)
    Debug: 94 110 embeddedice.c:401 embeddedice_write_reg(): 12: 0x00000000
    Debug: 95 110 embeddedice.c:401 embeddedice_write_reg(): 20: 0x00000000
    Debug: 96 110 openocd.c:160 handle_init_command(): jtag examine complete
    Debug: 97 110 openocd.c:166 handle_init_command(): flash init complete
    Debug: 98 110 openocd.c:170 handle_init_command(): mflash init complete
    Debug: 99 110 openocd.c:174 handle_init_command(): NAND init complete
    Debug: 100 110 openocd.c:178 handle_init_command(): pld init complete
    Debug: 101 125 gdb_server.c:2225 gdb_init(): gdb service for target arm7tdmi at port 3333
    Warn : 102 125 tcl_server.c:178 tcl_init(): no tcl port specified, using default port 6666
    User : 103 125 command.c:494 command_run_line():
    Debug: 105 125 command.c:91 script_command(): script_command - reset
    Debug: 106 125 command.c:108 script_command(): script_command - reset, argv[0]=ocd_reset
    Debug: 107 125 target.c:3911 jim_target(): Target command params:
    Debug: 108 125 target.c:3912 jim_target(): target names
    Debug: 109 141 target.c:3054 target_handle_event(): event: 11 reset-start - no action
    Debug: 110 141 jtag.c:2273 jtag_init_reset(): Trying to bring the JTAG controller to life by asserting TRST / RESET
    Debug: 111 141 jtag.c:1176 jtag_add_reset(): SRST line released
    Debug: 112 141 jtag.c:1183 jtag_add_reset(): JTAG reset with RESET instead of TRST
    Debug: 113 141 jtag.c:434 jtag_call_event_callbacks(): jtag event: JTAG controller reset (RESET or TRST)
    Debug: 114 141 jtag.c:1487 jtag_reset_callback(): -
    Debug: 115 141 jtag.c:434 jtag_call_event_callbacks(): jtag event: JTAG controller reset (RESET or TRST)
    Debug: 116 141 jtag.c:1487 jtag_reset_callback(): -
    Debug: 117 141 jtag.c:1172 jtag_add_reset(): SRST line asserted
    Debug: 118 141 jtag.c:1183 jtag_add_reset(): JTAG reset with RESET instead of TRST
    Debug: 119 141 jtag.c:434 jtag_call_event_callbacks(): jtag event: JTAG controller reset (RESET or TRST)
    Debug: 120 141 jtag.c:1487 jtag_reset_callback(): -
    Debug: 121 156 jtag.c:434 jtag_call_event_callbacks(): jtag event: JTAG controller reset (RESET or TRST)
    Debug: 122 156 jtag.c:1487 jtag_reset_callback(): -
    Debug: 123 156 jtag.c:1176 jtag_add_reset(): SRST line released
    Debug: 124 156 ft2232.c:1032 jtagkey_reset(): trst: 0, srst: 0, high_output: 0x09, high_direction: 0x0f
    Debug: 125 156 ft2232.c:1032 jtagkey_reset(): trst: 0, srst: 1, high_output: 0x01, high_direction: 0x0f
    Debug: 126 156 ft2232.c:1032 jtagkey_reset(): trst: 0, srst: 0, high_output: 0x09, high_direction: 0x0f
    Debug: 127 156 jtag.c:2240 jtag_init_inner(): Init JTAG chain
    Debug: 128 156 jtag.c:434 jtag_call_event_callbacks(): jtag event: JTAG controller reset (RESET or TRST)
    Debug: 129 156 jtag.c:1487 jtag_reset_callback(): -
    Debug: 130 156 jtag.c:434 jtag_call_event_callbacks(): jtag event: JTAG controller reset (RESET or TRST)
    Debug: 131 156 jtag.c:1487 jtag_reset_callback(): -
    Info : 132 172 jtag.c:1607 jtag_examine_chain(): JTAG tap: sam7x256.cpu tap/device found: 0x05b1703f (Manufacturer: 0x01f, Part: 0x5b17, Ver
    sion: 0x0)
    Error: 133 172 jtag.c:1631 jtag_examine_chain(): JTAG tap: sam7x256.cpu             got: 0x05b1703f (mfg: 0x01f, part: 0x5b17, ver: 0x0)
    Error: 134 172 jtag.c:1640 jtag_examine_chain(): JTAG tap: sam7x256.cpu expected 1 of 1: 0x3f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x3)
    Error: 135 172 jtag.c:2255 jtag_init_inner(): trying to validate configured JTAG chain anyway...
    Debug: 136 172 jtag.c:434 jtag_call_event_callbacks(): jtag event: JTAG controller reset (RESET or TRST)
    Debug: 137 172 jtag.c:1487 jtag_reset_callback(): -
    Debug: 138 172 target.c:3911 jim_target(): Target command params:
    Debug: 139 172 target.c:3912 jim_target(): target names
    Debug: 140 172 embeddedice.c:401 embeddedice_write_reg(): 12: 0x00000000
    Debug: 141 172 embeddedice.c:401 embeddedice_write_reg(): 20: 0x00000000
    Debug: 142 188 target.c:3911 jim_target(): Target command params:
    Debug: 143 188 target.c:3912 jim_target(): target names
    Debug: 144 188 target.c:3054 target_handle_event(): event: 12 reset-assert-pre - no action
    Debug: 145 188 arm7_9_common.c:810 arm7_9_assert_reset(): target->state: running
    Debug: 146 188 jtag.c:1172 jtag_add_reset(): SRST line asserted
    Debug: 147 188 jtag.c:1183 jtag_add_reset(): JTAG reset with RESET instead of TRST
    Debug: 148 188 jtag.c:434 jtag_call_event_callbacks(): jtag event: JTAG controller reset (RESET or TRST)
    Debug: 149 188 jtag.c:1487 jtag_reset_callback(): -
    Debug: 150 188 jtag.c:434 jtag_call_event_callbacks(): jtag event: JTAG controller reset (RESET or TRST)
    Debug: 151 188 jtag.c:1487 jtag_reset_callback(): -
    Debug: 152 188 target.c:3054 target_handle_event(): event: 13 reset-assert-post - no action
    Debug: 153 203 target.c:3911 jim_target(): Target command params:
    Debug: 154 203 target.c:3912 jim_target(): target names
    Debug: 155 203 target.c:3054 target_handle_event(): event: 14 reset-deassert-pre - no action
    Debug: 156 203 arm7_9_common.c:870 arm7_9_deassert_reset(): target->state: reset
    Debug: 157 203 jtag.c:1176 jtag_add_reset(): SRST line released
    Debug: 158 203 target.c:3054 target_handle_event(): event: 15 reset-deassert-post - no action
    Debug: 159 203 target.c:3911 jim_target(): Target command params:
    Debug: 160 203 target.c:3912 jim_target(): target names
    Debug: 161 203 target.c:3054 target_handle_event(): event: 21 reset-end - no action
    Debug: 162 203 ft2232.c:1032 jtagkey_reset(): trst: 0, srst: 1, high_output: 0x01, high_direction: 0x0f
    Debug: 163 266 ft2232.c:1032 jtagkey_reset(): trst: 0, srst: 0, high_output: 0x09, high_direction: 0x0f
    User : 164 266 command.c:494 command_run_line():
    Debug: 166 266 command.c:91 script_command(): script_command - init
    Debug: 167 266 command.c:108 script_command(): script_command - init, argv[0]=ocd_init
    User : 168 266 command.c:494 command_run_line():

    zawartość pliku sam7x256.cfg
    Code:

    #use combined on interfaces or targets that can't set TRST/SRST separately
    reset_config srst_only srst_pulls_trst

    if { [info exists CHIPNAME] } {   
       set  _CHIPNAME $CHIPNAME   
    } else {   
       set  _CHIPNAME sam7x256
    }

    if { [info exists ENDIAN] } {   
       set  _ENDIAN $ENDIAN   
    } else {   
       set  _ENDIAN little
    }

    if { [info exists CPUTAPID ] } {
       set _CPUTAPID $CPUTAPID
    } else {
       set _CPUTAPID 0x3f0f0f0f
    }

    jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

    set _TARGETNAME [format "%s.cpu" $_CHIPNAME]

    target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
    $_TARGETNAME configure -event reset-init {
       # disable watchdog
       mww 0xfffffd44 0x00008000   
       # enable user reset
       mww 0xfffffd08 0xa5000001   
       # CKGR_MOR : enable the main oscillator
       mww 0xfffffc20 0x00000601   
       sleep 10
       # CKGR_PLLR: 96.1097 MHz
       mww 0xfffffc2c 0x00481c0e    
       sleep 10
       # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
       mww 0xfffffc30 0x00000007   
       sleep 10
       # MC_FMR: flash mode (FWS=1,FMCN=60)
       mww 0xffffff60 0x003c0100   
       sleep 100
    }

    $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0

    #flash bank <driver> <base> <size> <chip_width> <bus_width>
    flash bank at91sam7 0 0 0 0 0

    # For more information about the configuration files, take a look at:
    # openocd.texi

    zawartość pliku jtagkey.cfg:
    Code:

    telnet_port 4444
    gdb_port 3333
    gdb_memory_map enable
    gdb_flash_program enable

    #interface
    interface ft2232
    ft2232_device_desc "ARMJTAG A"
    ft2232_layout jtagkey
    ft2232_vid_pid 0x0403 0xcff8
    jtag_speed 5

    oraz wykonuje taki skrypt:
    Code:

    halt
    sleep 10
    mww 0xfffffd44 0x00008000   # disable watchdog
    mww 0xfffffd08 0xa5000001   # enable user reset
    mww 0xfffffc20 0x00000601   # CKGR_MOR : enable the main oscillator
    sleep 10
    mww 0xfffffc2c 0x00481c0e    # CKGR_PLLR: 96.1097 MHz
    sleep 10
    mww 0xfffffc30 0x00000007   # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
    sleep 10
    mww 0xffffff60 0x003c0100   # MC_FMR: flash mode (FWS=1,FMCN=60)
    #poll
    #flash probe 0
    flash info 0
    arm7_9 dcc_downloads enable
    at91sam7 gpnvm 0 2 set
    flash protect_check 0
    flash protect 0 0 15 off
    flash erase_sector 0 0 15
    flash erase_check 0
    sleep 10
    poll
    flash write_bank 0 sam7xtest.bin 0x0
    flash info 0
    #at91sam7 gpnvm 0 2 set
    #dump_image flash.bin 0x0000000 0x00040000
    reset run
    sleep 10
    shutdown

    przebieg w oknie telnet:
    Code:

    > script sam7x_reset.script
    target state: halted
    target halted in ARM state due to debug-request, current mode: Supervisor
    cpsr: 0x600000d3 pc: 0x00000000
    #0: at91sam7 at 0x00100000, size 0x00040000, buswidth 4, chipwidth 0
            #  0: 0x00000000 (0x40000 256kB) protection state unknown

    at91sam7_old information: Chip is AT91SAM7X256
    cidr: 0x275b0940, arch: 0x0075, eproc: ARM7TDMI, version:0x000,  flashsize: 0x00040000
    master clock(estimated): 53164kHz
    pagesize: 256, lockbits: 16 0x0000, pages in lock region: 64
    securitybit: 0,  nvmbits(3): 0x4

    dcc downloads are enabled
    successfully checked protect state
    cleared protection for sectors 0 through 15 on flash bank 0
    Sector numbers based on lockbit count, probably a deprecated script
    erased sectors 0 through 15 on flash bank 0 in 0.062500s
    successfully checked erase state
            #  0: 0x00000000 (0x40000 256kB) erase state unknown
    target state: halted
    target halted in ARM state due to debug-request, current mode: Supervisor
    cpsr: 0x600000d3 pc: 0x00000000
    wrote  1024 byte from file sam7xtest.bin to flash bank 0 at offset 0x00000000 in 0.187500s (5.333333 kb/s)
    #0: at91sam7 at 0x00100000, size 0x00040000, buswidth 4, chipwidth 0
            #  0: 0x00000000 (0x40000 256kB) protection state unknown

    at91sam7_old information: Chip is AT91SAM7X256
    cidr: 0x275b0940, arch: 0x0075, eproc: ARM7TDMI, version:0x000,  flashsize: 0x00040000
    master clock(estimated): 53164kHz
    pagesize: 256, lockbits: 16 0x0000, pages in lock region: 64
    securitybit: 0,  nvmbits(3): 0x4

    JTAG tap: sam7x256.cpu tap/device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
    JTAG Tap/device matched


    Połączenie z hostem przerwane.

    jeśli układ jest w current mode: abortmode
    to wywołanie polecenia odczytu pamięci powoduje odczyt ale pamięc jest cała zapisana.
    Natomiast aby wejść w tryb: current mode: Supervisor
    muszę nałożyć zworke na JTAGSEL i przy wykonywaniu skryptu wyjąć wtedy przechodzi w tryb Supervisor, inaczej daje:
    Code:

    Debug: 180 7609 target.c:1724 target_wait_state(): waiting for target halted...
    Error: 190 12609 target.c:1731 target_wait_state(): timed out while waiting for target halted
    Debug: 191 12609 command.c:427 run_command(): Command failed with error code -4
    User : 192 12609 command.c:626 openocd_jim_vfprintf(): Runtime error, file "sam7x_reset.script", line 8:
        User : 193 12609 command.c:626 openocd_jim_vfprintf():
    User : 196 12609 command.c:626 openocd_jim_vfprintf():
    User : 198 12609 command.c:626 openocd_jim_vfprintf():

    W tym trybie po odczycie pamięci od sektora 0x00000000 do 0x00400000 w pliku bin znajdują sie dane:
    do adresu 0x00000ad1 reszta to same;
    następnie od 0x00400000 do 0x0040ad1(wygląda na to samo co od adresy 0x00000000 do 0x00000ad1)
    potem od 0x00080000 do 0x00080ad1(to samo co wyżej)
    od 0x00200000 do końca na zmiane co jakiś czas krzaki i zera ;)

    Próba zmienienia bitów gpnvm bits a następnie sprawdzenie poleceniem flash info 0, daje to samo.
    Może czegoś nie podłączyłem, może jakieś piny trzeba jeszcze zewrzeć aby odpalić JTAG lub SAM-BE.
    Proszę o dalsze instrukcje, pomysły...

    0
  • CControls
  • #5 22 Lut 2009 23:00
    Freddie Chopin
    Specjalista - Mikrokontrolery

    czemu nie uproscisz? czemu po prostu nie zresetujesz i nie wydasz polecenia flash_write z paremetrem erase?

    4\/3!!

    0
  • #6 23 Lut 2009 18:55
    mastermariusz
    Poziom 11  

    tym razem wpisałe:

    Code:
    flash write_image erase sam7xtest.bin 0x00100000 bin

    otrzymuje w okienku telnet-u
    Code:
    auto erase enabled
    
    wrote 1024 byte from file sam7xtest.bin in 0.312500s (3.200000 kb/s)

    po odczycie sektora 0x00100000 zawartość zczytanego pliku różni sie od tego niby zapisanego.
    Próbowałem jeszcze procedury odpalenia sam-by ale bez skutków.
    Robiłem to tak
    -Przy wyłączonym zasilaniu włożyłem zworke na pin erase
    -włączyłem zasilanie, odczekując około 30sekund
    wyłanczam, zdejmuje zworke, wkładam kabel USB i włączam zasilanie.
    Jedyne co wyskakuje to nieznane urządzenie. A w polu wyboru Programiku SAM-BA v2.6 jest tylko com.
    Przy wgrywaniu flesha trzeba także wywołać:
    Code:
    > flash protect 0 0 15 off
    
    cleared protection for sectors 0 through 15 on flash bank 0
    > flash erase_sector 0 0 15
    Sector numbers based on lockbit count, probably a deprecated script
    erased sectors 0 through 15 on flash bank 0 in 0.078125s

    a także wywołać polecenie
    Code:
    at91sam7 gpnvm 0 2 set

    niby wszystko przebiega wpożądku ale żadnych oznak życia.
    Po wgraniu dwóch innych flash-ów następnie odczycie od sektora 0x00100000 dostaje to samo.
    po wpisaniu polecenia
    Code:
    flash info 0

    niezależnie czy wpisze
    Code:
     at91sam7 gpnvm 0 2 set

    czy
    Code:
    at91sam7 gpnvm 0 2 clear 

    otrzymuje
    Code:
    > flash info 0
    
    #0: at91sam7 at 0x00100000, size 0x00040000, buswidth 4, chipwidth 0
            #  0: 0x00000000 (0x40000 256kB) protection state unknown

    at91sam7_old information: Chip is AT91SAM7X256
    cidr: 0x275b0940, arch: 0x0075, eproc: ARM7TDMI, version:0x000,  flashsize: 0x00040000
    master clock(estimated): 53180kHz
    pagesize: 256, lockbits: 16 0x0000, pages in lock region: 64
    securitybit: 0,  nvmbits(3): 0x4

    Poprostu ręce opadają:/

    0
  • #7 23 Lut 2009 19:08
    Freddie Chopin
    Specjalista - Mikrokontrolery

    czy procek na pewno jest sprawny? bo wychodzi na to, ze niezbyt, skoro nawet firmowy bootloader go nie rusza?

    moze na innym kompie pojdzie?

    4\/3!!

    0
  • #8 23 Lut 2009 19:24
    mastermariusz
    Poziom 11  

    może podczas lutowania sie przegrzał w co wątpie.
    U kolegi był sprawdzany i to samo było.
    Ale ogólnie coś tam daje znać.
    Już nie wiem o co chodzi.
    Chyba sie porwałem troszkę...
    Może zaczne od czegoś mniejszego np. sam7s64.
    A może coś Philipsa. Co byś polecił?

    0
  • #9 23 Lut 2009 19:34
    Freddie Chopin
    Specjalista - Mikrokontrolery

    ogolnie mialem stycznosc tylko z LPC2xxx i STM32 (ale to dla mnie nowosc). Z tego co wyczytalem w necie wnioskuje, ze z twoim prockiem cos musi byc nie tak, albo robisz gdzies powazny blad, bo wszyscy chwala Atmele za latwosc uzywania.

    anyway - stm32 to ponoc 'przyszlosc' - sa tanie, szybkie, ponoc dobre [; LPC maja swoje wady, sa troszke drozsze, troszke mniej wydajne, ale sa sprawdzone i potwierdzam, ze dzialaja tak jak nalezy (;

    jesli masz taka mozliwosc, to dobrze byloby sprawdzic twoje ustawienia (sposob postepowania) z jakas dzialajaca makieta albo czyims dzialajacym na 100% prockiem - wyeliminujesz wtedy jedna niewiadoma, bo tak naprawde to mozliwe jest, ze procek jest padniety.

    moze sprobuj jakis inny soft (jesli obsluguje twojego JTAGa - chocby Crossworks, albo H-JTAG).

    4\/3!!

    0
  • #10 23 Lut 2009 19:41
    mastermariusz
    Poziom 11  

    Dobra, wielkie dzięki za pomoc. Narazie odstawiam x256 bo można zbzikować...;) Może z czasem sie odpali. Spróbuje jeszcze z innym atmelem. Ale czekam na propozycje innych urzytkowników.

    Pozdrawiam
    Mariusz W.

    0
  • #11 24 Lut 2009 05:36
    Smashing
    Poziom 20  

    Witam
    Miałem też taki problem że sam7x działał ale po kolejnym wgraniu programu przestał działać. Przelutowałem procka 2 razy. W końcu kupiłem nową płytkę, a starego odstawiłem. Kiedyś przez przypadek do niego wróciłem i spróbowałem uruchomić program w ramie i o dziwo poszło, ale z flasha nie chciał iść.
    Może to jest coś dziwnego ale jak w skrypcie linkera mam:
    flash: ORIGIN = 0x00100000, LENGTH = 256K to jest ok
    jak było flash: ORIGIN = 0x0, LENGTH = 256K to ten procek nie chciał ruszyć, chodź przedtem działało. Nie dało się też debugować, musiałem zmienić na flash: ORIGIN = 0x00100000. Zrobiłem to przez przypadek...
    Wydaje mi się że te procki są strasznie nie odporne na temperaturę, kup nową płytkę, sprawdzoną koszt koło 100 zl, albo pożycz od kogoś. Jak nie masz tyle kasy kup sam7s jest mniejszy, i praktycznie nie ma tylko lanu. Arm'ow nie odstawiaj..powodzenia.

    0
  • #12 24 Lut 2009 06:40
    mastermariusz
    Poziom 11  

    Chyba tak zrobie. Kupie jakąs gotową płytke. Choćby samą z ARM-em bez żadnych LCD i takich tam... Na AVR-kach już umiem co nieco zrobić, teraz przyszedł czas na ARM-y. Oczywiście nie będe sie poddawał i zakupie jakiś ARM z S-ką, mniejsze, tańsze, nie będzie tak szkoda :) i chyba więcej materiałów na początek znajde w necie:). SAM7x256 zostawie na spokojniejsze dni :)

    Pozdrawiam
    Mariusz W.

    0
  • #13 07 Mar 2009 19:03
    AlphaX
    Poziom 12  

    Żeby korzystać z SAM-BA to chyba zworke trzeba na pin TST założyć. Tak mi sie wydaje...

    0