I2C w C MSP430

#define RXTXI2C R7 ; I2C Receive/Transmit Register
#define ADDRI2C R8 ; I2C Address Register
#define DATAI2C R9 ; I2C Data Register
#define BITI2C R10 ; I2C Bit Counter Register
;
; Definitions for I2C bus
DACADDR equ 098h ; DAC8574 HW Address (A0=A1=0+WR)
DACCTRL equ 034h ; DAC Control Word (Broadcast to all DAC Channels)
SCL equ 001h ; P2.0 controls SCL line (pull-up)
SDA equ 002h ; P2.1 controls SDA line (pull-up)
TRIG equ 001h ; Trigger point
;******************************************************************************
#include   ”msp430x44x.h”
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; 16−bit Sine Lookup table with 256 steps
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ORG 0F000h
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RESET mov.w #300h,SP ; Initialize stack−pointer
call #Init_Sys  ; Initialize system
clr.w R6
One_Shot
; bis.b #TRIG,&P4OUT ; Toggle Trigger
; bic.b #TRIG,&P4OUT
mov.b #DACADDR,RXTXI2C ; Load DAC8574 Address
call #I2C_Start ; Generate Start Condition
call #I2C_TX
call #I2C_Stop  ; Generate Stop Condition
mov.b #DACADDR,RXTXI2C ; Reload DAC8574 Address
call #I2C_Start ; Repeat Start
call #I2C_TX
mov.b #DACCTRL,RXTXI2C ; Load DAC8574 Control Byte
call #I2C_TX
Write_Data
mov.w #0FFh,R6
mov.w #0,R5
Again mov.w Sin_tab(R5),DATAI2C
swpb DATAI2C ; MSB first
call #Write_I2C
swpb DATAI2C ; LSB next
call #Write_I2C
incd.w R5
sub.w #1,R6
and.w #0FFh,R6
jnz Again
jmp Write_Data
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Init_Sys;   Subroutine sets up Modules and Control Registers
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mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupFLL2 bis.b #FN_4,&SCFI0 ; x2 DCO, 8MHz nominal DCO
bis.b #DCOPLUS+XCAP14PF,&FLL_CTL0 ; DCO+, configure load caps
mov.b #121,&SCFQCTL ;(121+1) x 2 x 32768 = 7.99 MHz
SetupPorts mov.b #0FFh,&P1DIR ; Set port to outputs
clr.b &P1OUT ; P1OUTs = 0
mov.b #0FFh,&P2DIR ; Set port to outputs
clr.b &P2OUT ; P2OUTs = 0
mov.b #0FFh,&P3DIR ; Set port to outputs
clr.b &P3OUT ; P3OUTs = 0
mov.b #0FFh,&P4DIR ; Set port to outputs
clr.b &P4OUT ; P4OUTs = 0
mov.b #0FFh,&P5DIR ; Set port to outputs
clr.b &P5OUT ; P5OUTs = 0
mov.b #0FFh,&P6DIR ; Set port to outputs
clr.b &P6OUT ; P6OUTs = 0
ret ; 
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Write_I2C
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mov.b DATAI2C,RXTXI2C ; Load Out−Going Data
call #I2C_TX ; Send Data and Acknowledge
ret ; Return from subroutine
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I2C_Start; enter SDA=1, SCL=x
; exit  SDA=1, SCL=0
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bic.b #SCL+SDA,&P2DIR ; SCL and SDA to input direction
bic.b #SCL+SDA,&P2OUT ; SCL=1, SDA=1
bis.b #SDA,&P2DIR ; SDA=0
bis.b #SCL,&P2DIR ; SCL=0
ret
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I2C_TX; enter SDA=x, SCL=0
; exit  SDA=1, SCL=0
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mov #08,BITI2C   ; number of bits to transfer
I2C_TX_Bit rla.b RXTXI2C ; data bit −> carry
jc I2C_TX1 ; test carry for 1 or 0
I2C_TX0 bis.b #SDA,&P2DIR ; SDA=0
jmp I2C_TXx ; Toggle SCL
I2C_TX1 bic.b #SDA,&P2DIR ; SDA=1
jmp I2C_TXx
I2C_TXx bic.b #SCL,&P2DIR ; SCL=1
nop ; delay to meet I2C spec
nop ;
bis.b #SCL,&P2DIR ; SCL=0
dec BITI2C ; all bits read?
jnz I2C_TX_Bit ; continue until 8 bits are sent
  bic.b #SDA,&P2DIR ; SDA=1, release SDA line for acknowledge
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TX_Ackn bic.b #SCL,&P2DIR ; SCL=1
nop ; delay to meet I2C spec
nop ;
bis.b #SCL,&P2DIR ; SCL=0
ret ; Return from subroutine
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I2C_Stop; enter SDA=x, SCL=0
; exit  SDA=1, SCL=1
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bis.b #SDA,&P2DIR ; SDA = 0
bic.b #SCL,&P2DIR ; SCL = 1
bic.b #SDA,&P2DIR ; SDA = 1
I2C_End ret ; Return from subroutine
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; Interrupt Vectors Used MSP430F449
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ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END

I2C_start()
{
  P2DIR =~ 3; //SDA=SCL=1
  P2OUT =~ 3;
  P2DIR = 2;  //P2.1=OUT P2.0=IN -> SDA=0:SCL=1
  P2DIR = 1;  //P2.1=IN P2.0=OUT -> SDA=1:SCL=0
}

#define	SDA	0
#define	SCL	1
#define	PI2C	P2DIR

inline	void	ALL_LO()
{
	PI2C|=(1<<SDA)|(1<<SCL);
}
inline	void	ALL_HI()
{
	PI2C&=~( (1<<SDA)|(1<<SCL) );
}
inline	void	SDA_LO()
{
	PI2C|=(1<<SDA);
}
inline	void	SCL_LO()
{
	PI2C|=(1<<SCL);
}
inline	void	SDA_HI()
{
	PI2C&=~(1<<SDA);
}
inline	void	SCL_HI()
{
	PI2C&=~(1<<SCL);
}

//zwolnij magistralę i2c
 P2SEL&=~(1<<SDA) | (1<<SCL); //   I/O
 P2REN&=~(1<<SDA) | (1<<SCL); //  wyłącz pull-up/down
 P2DIR&=~(1<<SDA) | (1<<SCL); //  wejscie
 P2OUT&=~(1<<SDA) | (1<<SCL);